Dynamically Reconfigurability Computing

Abstract

In the past few years, there has been a boom in the computer industry. The processor speed has jumped from 500 MHz to 4 GHz and is still increasing. High speed rams and hard disks are becoming available. But people are always greedy and they always want more. Experts are beginning to look for ways to accelerate the speed-up.

Every other day an expert wakes up and shouts something like DNA computing, stream computing, just so computing etc. This seminar introduces Dynamically Reconfigurable Computing which, unlike the above-mentioned computing, is much more viable in the near future. This seminar also hopes to convince that the future of the proprietary model is a big zero.
Dynamically Reconfigurable Computing is the computing that uses Dynamically Reconfigurable Logic. The latter is the logic that can be altered at run-time. Since both their names are rather long, we will call them DRC and DRL from now on. Though DRC uses DRL, anything that use DRL is not DRC. To be called a DRC, many more components must be there, the most important among them being proper software that can drive the logic.
Without the software, a common man will be left with a non-reconfigurable hardware that is both larger and somewhat slower than its traditional counterpart (if even that - most of the time he will be left with just a piece of non-usable hardware which he regrets).
And obviously, application software must be there .A Dynamically Reconfigurable System without application software is like a PC without a single piece of software in it - both are wasted resources. Thus the hardware part and the software part combine to make a DR Computing system. Now we will see why take all the trouble to make and combine hardware and software that nobody is actually comfortable with. And then we will see what are the "all the trouble ".
Almost all the DRC systems today consist of FPGAs. System designers have always used FPGAs for prototyping the design of Application Specific Integrated Circuits (ASICs). When the design is finalized, FPGA is thrown away and the final product has no FPGA part. When used in this way, the role of FPGA is just a placeholder. This is not DRC. However, now some system designers choose to leave the FPGA part in the production system.
This has the advantage that the logic within the system can changed even after the product has been shipped. For example, hardware upgrades and bug fixes can be administrated as easily as their software counterparts. In order to support a new version of the network protocol, the designer just have to redesign the internal logic of the FPGA and send it to the customers by e-mail.

The customer can download the new design to the system and restart it and la voilà - their system supports the newest protocol, all without a single "hardware upgrade ".This is Configurable Computing.DRC takes this to one step further.
DRC involves manipulation of logic inside FPGA (DRL)at run-time. ie, the design of the hardware changes in response to the demands placed upon the system at run-time. What a CPU do to software, DRC do to hardware. This means that FPGA acts as an execution engine for a number of different hardware functions. These hardware functions can execute in a parallel or serial fashion.
Dynamically Reconfigurable Computing allows the system to execute more hardware functions than it has gates to fit. This is excellent since many parts of the system will idle most of the time.